Semiconductor memory device equipped with step-down power voltag

Static information storage and retrieval – Powering – Conservation of power

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36523003, 36523006, G11C 700

Patent

active

052726770

ABSTRACT:
A dynamic random access memory device includes a plurality of memory cell plates each having memory cells and a sense amplifier circuit array selectively coupled with the memory cells, and the sense amplifier circuit array selectively enters a standby mode and amplifying mode depending upon first and second driving signals supplied thereto, wherein the first and second driving signals are regulated to an intermediate voltage level between a step-down power voltage level and a ground voltage level in the standby mode with a main step-down power voltage signal supplied from a main step-down circuit; however, the first and second driving signals are changed to the step-down voltage level and the ground voltage level with an auxiliary step-down power voltage signal produced from an external power voltage signal at an auxiliary step-down circuit exclusively associated therewith so that undesirable voltage fluctuation hardly takes place on a main step-down power voltage line.

REFERENCES:
patent: 4701885 (1987-10-01), McElroy
patent: 4908798 (1990-03-01), Urai
patent: 5157631 (1992-10-01), Shinogawa
patent: 5208774 (1993-05-01), Shibue

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