Semiconductor memory device equipped with discharging unit for b

Details Semiconductor memory device equipped with discharging unit for b Semiconductor memory device equipped with discharging unit for b

1993-10-05

1995-01-17

Callahan, Timothy P.

Static information storage and retrieval

Addressing

36523003, 36523006, 36523008, 365203, G11C 800, G11C 700

Patent

active

053831586

ABSTRACT:
A static random access memory device is usually equipped with an address decoder having unused output nodes, and an external address signal designating one of the unused output nodes causes output data paths to be kept in a precharged state and, accordingly, feed-through current to flow through output data drivers, because only small differential voltage is left between the precharging voltage level and the threshold level of the component transistors of the output data drivers, wherein a switching circuit allows the output data paths to couple with either high or low voltage source upon selection of one of the unused output nodes so as to protect the output data paths against the feed-through current.

REFERENCES:
patent: 4730279 (1988-03-01), Ohtani
patent: 4821235 (1989-04-01), Heald
patent: 4866677 (1989-09-01), Sakurai
patent: 4953127 (1990-08-01), Nagahashi et al.
patent: 4984204 (1991-01-01), Sato et al.
patent: 5124947 (1992-06-01), Nakada

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