Semiconductor memory device containing junction field effect tra

Details Semiconductor memory device containing junction field effect tra Semiconductor memory device containing junction field effect tra

1993-05-21

1995-02-28

Loke, Steven Ho Yin

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Junction field effect transistor

257272, 257296, 257306, 365149, H01L 2980, H01L 31112, H01L 27108, G11C 1124

Patent

active

053939980

ABSTRACT:
The miniaturization of junction field effect transistors constituting memory cells and higher integration of a dynamic semiconductor memory device are attained. Word lines composed of a p-type impurity diffusion layer are formed on an n-type silicon substrate. An n-type impurity diffusion layer is formed within the p-type impurity diffusion layer. The n-type impurity diffusion layer constitutes two source-drain regions and a channel region, and the p-type impurity diffusion layer constitutes a gate region in each junction field effect transistor. The diffusion layer depth of the channel region is less than that of the source-drain regions. Bit lines are connected to one source-drain region, and storage nodes are connected to the other source-drain region. Each capacitor is made of a storage node, a dielectric film and a cell plate electrode.

REFERENCES:
patent: 3378737 (1968-04-01), Welty
patent: 4423490 (1983-12-01), Roesner
"A Capacitor-Over-Bit-Line (COB) Cell with a Hemispherical-Grain Storage Node for 64Mb DRAMS", by M. Sakao et al, IEEE IEDM Technical Digest, pp. 655-658, 1990.

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