Semiconductor memory device consistently operating a plurality o

Details Semiconductor memory device consistently operating a plurality o Semiconductor memory device consistently operating a plurality o

1998-11-02

1999-11-16

Yoo, Do Hyun

Static information storage and retrieval

Addressing

Plural blocks or banks

36518905, 365194, 36523006, 36523008, G11C 700

Patent

active

059869640

ABSTRACT:
A semiconductor memory device of the present invention is provided with a plurality of memory cell arrays distributed and thus arranged and having the same function, and a main control circuit and local control circuits that are structured hierarchically. Each memory cell array has its operation controlled directly by any of the local control circuits, wherein the main control circuit including a command producing circuit which responds to an externally applied signal to produce a control signal corresponding to a predetermined mode of operation, and a global control circuit which responds to a control command to generate a control signal for operating the entire semiconductor memory device consistently. The local control circuits receive the control signal from the global control circuit to cause memory cell arrays to perform a predetermined operation.

REFERENCES:
patent: 5894448 (1999-04-01), Amano et al.

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