Semiconductor memory device comprising address holding flip-flop

Details Semiconductor memory device comprising address holding flip-flop Semiconductor memory device comprising address holding flip-flop

1983-09-20

1987-05-12

Moffitt, James W.

Static information storage and retrieval

Addressing

Sync/clocking

364132, G11C 800

Patent

active

046655093

ABSTRACT:
This invention relates to a semiconductor memory having flip-flops which hold the address input in order to absorb skew thereof within the same chip. The flip-flops are connected to be of the master-slave type and an address decoder is provided between the master flip-flops and the slave flip-flops. A part of the time required for latching the address signal into the master flip-flops and a part of the time required for decoder operation are overlapped, and thereby a high operation rate can be realized. Parts of the circuits forming the flip-flop circuits are used in common to the address input buffer and also in common to the word line driver circuits.

REFERENCES:
patent: 3732440 (1973-11-01), Platt et al.
patent: 4409680 (1983-10-01), Schnathorst et al.
patent: 4528647 (1985-07-01), Chamberlain

Affiliated with

Also associated with

Rating

Semiconductor memory device comprising address holding flip-flop does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device comprising address holding flip-flop, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device comprising address holding flip-flop will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1806097