Semiconductor memory device capable of stably setting mode...

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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C365S233100, C365S201000

Reexamination Certificate

active

07065000

ABSTRACT:
A semiconductor memory device having a mode register set (MRS) includes: a decoding unit for decoding a plurality of address signals included in the MRS and outputting a plurality of decoded signals; and an output unit for outputting a plurality of configuration signals and activating one of the plurality of configuration signals in response to the plurality of decoded signals, wherein the output unit keeps its previous output signals if more than one of the plurality of decoded signals are activated.

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patent: 6104668 (2000-08-01), Lee et al.
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patent: 6347356 (2002-02-01), Saho
patent: 6392909 (2002-05-01), Jang et al.
patent: 6693832 (2004-02-01), Ok
patent: 2003/0053362 (2003-03-01), Kawaguchi et al.
patent: 2000-036192 (2000-02-01), None
patent: 2004-079162 (2004-03-01), None

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