Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1987-06-05
1990-02-27
Hecker, Stuart N.
Static information storage and retrieval
Addressing
Plural blocks or banks
36523008, 36518908, 365233, G11C 700, G11C 1140
Patent
active
049052012
ABSTRACT:
A semiconductor memory device having a memory cell array constituted by a plurality of memory cell blocks includes a clock generator unit constituted by a plurality of clock generator sections, each of the clock generator sections corresponding to each of the memory cell blocks, and a block selector unit for selecting one of the clock generator sections in correspondence with the row address of a designated address. Accordingly, only a clock generator section corresponding to the selected memory cell block is operated by the designated address.
REFERENCES:
patent: 3855580 (1974-12-01), Lighthall et al.
patent: 3931616 (1975-01-01), Klos
patent: 3935565 (1976-01-01), Moore, III
patent: 4532612 (1985-07-01), Tanaka et al.
patent: 4701843 (1987-10-01), Cohen
Nakano Tomio
Ohira Tsuyoshi
Bowler Alyssa H.
Fujitsu Limited
Hecker Stuart N.
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