Static information storage and retrieval – Interconnection arrangements
Patent
1999-05-20
2000-02-01
Tran, Andrew Q.
Static information storage and retrieval
Interconnection arrangements
365 51, 36523003, 36518906, 36518901, G11C 506
Patent
active
060210621
ABSTRACT:
A semiconductor memory device comprises a plurality of banks (B1-Bn), a plurality of local buses (L0T and L0N-LnT and LnN) arranged in the banks, and a global bus (G) connected to the local buses. A switching element (TR05 and TR06-TRn5 and TRn6) is arranged at a junction between each of the local buses and the global bus. The switching element comprises a transistor. The transistor is responsive to a signal supplied from the local bus to its gate. The transistor connects the local bus and the global bus.
REFERENCES:
patent: 5912857 (1999-06-01), Kim et al.
NEC Corporation
Tran Andrew Q.
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