Semiconductor memory device capable of multidirection data selec

Details Semiconductor memory device capable of multidirection data selec Semiconductor memory device capable of multidirection data selec

1988-01-13

1990-01-23

Hecker, Stuart N.

Static information storage and retrieval

Addressing

Plural blocks or banks

36518902, 36523002, 364200, G11C 700, G11C 800, G06F 100

Patent

active

048963011

ABSTRACT:
An improved semiconductor memory device provided with an address scramble unit in addition to a multidirection data selection unit. The address scramble unit converts an external address having an addressing linearity regardless of a complex multidirection data selection into an internal address used by the multidirection data selection unit. A plurality of memory cells are connected between a plurality of word lines and a plurality of bit lines to form a logical space; a plurality of boundaries being defined in a direction thereof. Each boundary includes a plurality of segments each defining a plurality of simultaneously accessible bit data. The multidirection data selection unit outputs a data in response to a segment designation address a direction signal and a segment internal address, from a boundary data selected by a row address.

REFERENCES:
patent: 4594587 (1986-06-01), Chandler
patent: 4651308 (1987-03-01), Sato
patent: 4675849 (1987-06-01), Kinoshita
patent: 4688197 (1987-08-01), Novak et al.
patent: 4782488 (1988-11-01), Anderson
patent: 4811297 (1989-03-01), Ogawa

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