Semiconductor memory device capable of executing high-speed...

Details Semiconductor memory device capable of executing high-speed... Semiconductor memory device capable of executing high-speed...

2007-04-19

2010-11-23

Le, Vu A (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185260, C365S185160

Reexamination Certificate

active

07839686

ABSTRACT:
A plurality of memory cells are arranged in a memory cell array. The plurality of memory cells are connected to a plurality of word lines and a plurality of bit lines. A plurality of source lines are disposed along the plurality of bit lines. The plurality of source lines are connected respectively to sources of the plurality of memory cells at a time of data read.

REFERENCES:
patent: 5646886 (1997-07-01), Brahmbhatt
patent: 6301155 (2001-10-01), Fujiwara
patent: 6657891 (2003-12-01), Shibata et al.
patent: 6850439 (2005-02-01), Tanaka
patent: 7307332 (2007-12-01), Nakagawa
patent: 7593253 (2009-09-01), Takemura et al.
patent: 2005/0254302 (2005-11-01), Noguchi
patent: 2006/0133150 (2006-06-01), Shibata
patent: 2009/0279360 (2009-11-01), Lee et al.
patent: 2004-192789 (2004-07-01), None
patent: 2006-172630 (2006-06-01), None
U.S. Appl. No. 12/055,074, filed Mar. 25, 2008, Shibata.

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