Semiconductor memory device and read access method thereof

Details Semiconductor memory device and read access method thereof Semiconductor memory device and read access method thereof

2011-06-07

2011-06-07

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S063000, C365S194000, C365S203000

Reexamination Certificate

active

07957200

ABSTRACT:
The semiconductor memory device includes a plurality of memory cell arrays and a control circuit that outputs a first signal and a second signal. The first signal instructs start of precharging of each memory cell array. The second signal instructs completion of the precharging and transition to a read access. The first signal is wired through one or more delay circuits to arrive at each memory cell array with a time difference, and the second signal is wired not through the one or more delay circuits.

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