Semiconductor memory device and production method of the same

Details Semiconductor memory device and production method of the same Semiconductor memory device and production method of the same

1998-12-23

2001-11-06

Meier, Stephen D. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S295000, C257S769000, C257S306000, C257S310000, C438S738000, C438S580000, C438S608000, C438S609000

Reexamination Certificate

active

06313539

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory device and a method for producing the same. In particular, the present invention relates to a semiconductor memory device incorporating a capacitor which includes a lower electrode, a dielectric film, and an upper electrode, the capacitor being electrically connected to a selection transistor via an electrically conductive plug and a diffusion barrier film, as well as a method for producing the same. The present invention further relates to a method for producing a capacitor for use in such a semiconductor memory device, the capacitor including a ferroelectric film (hereinafter, such a capacitor will also be referred to as a “ferroelectric capacitor”), as well as a method for producing a non-volatile semiconductor memory device incorporating such a ferroelectric capacitor.
2. Description of the Related Art
Ferroelectric materials have a large range of applications for various devices utilizing their functions including spontaneous polarization, high dielectric constant, electro-optical effects, piezoelectric effects, pyroelectric effects, and the like. For example, the pyroelectric properties of ferroelectric materials are utilized in infrared linear array sensor applications; their piezoelectric properties are utilized in ultrasonic wave sensor applications; their electro-optical effects are utilized in waveguide type optical modulator applications; their high dielectric properties are utilized in capacitors for use in DRAMs (Dynamic Random Access Memories) and MMICs (Monolithic Microwave Integrated Circuits), and so on.
Above all, non-volatile memories (FRAMs: ferroelectric non-volatile memories), which incorporate a ferroelectric film and are capable of high-density implementation and high-speed operation, have been a subject of intensive development, in response to the recent development in thin film formation technologies in combination with semiconductor memory art. FRAMs provide advantages such as high-speed writing/reading, low voltage operation, and high endurance through repetitive writing/reading. Therefore, research and development efforts have been made to implement FRAMs which can replace not only conventional non-volatile memories but potentially SRAMs and/or DRAMs also.
Conventional non-volatile memories such as EPROMs, EEPROMs, and flash memories require a read time which is equivalent to that required for a DRAM. However, they require a long write time, thereby hindering high-speed operation. On the other hand, FRAMs are capable of both reading and writing at a rate which is equivalent to-that of DRAMs. Thus, high-speed operation is expected of FRAMS. In a typical device structure of an FRAM, one cell is constructed from one selection transistor and one ferroelectric capacitor; alternatively, one cell is constructed from two selection transistors and two ferroelectric capacitors.
Conventionally, oxide ferroelectric materials (PZT (lead zirconate titanate), SrBi
2
Ta
2
O
9
, Bi
4
Ti
3
O
12
, etc.) have been studied as ferroelectric materials for use in a ferroelectric capacitor. As a lower electrode of such a ferroelectric capacitor, electrodes formed of a precious metal material (e.g., Pt, Pt/Ta, Pt/Ti) or composite electrodes formed of precious metal material(s) and a closely contacting film have been used for improved characteristics of the resultant thin ferroelectric film.
A ferroelectric film must be in the form of a crystallized film in order for its functions to be fully utilized. Therefore, a high-temperature heat treatment at about 600° C. to about 800° C. in an oxygen atmosphere is required as a crystallization process.
Furthermore, it is generally considered essential to employ a stacked structure in order to achieve a high density integration, e.g., 4 Mbits or above, by utilizing such a ferroelectric capacitor and manufacturing processes thereof. This in turn requires a structure in which a selection transistor is electrically coupled to a ferroelectric capacitor via an electrically conductive plug, e.g., polysilicon. In the case of a Pt/polysilicon structure, a diffusion barrier film (e.g., TiN) is required so as to prevent silicidation of a Pt lower electrode which may occur during a crystallization process of the ferroelectric material.
However, although a Pt film itself has sufficient anti-oxidation properties, the TiN layer in a Pt/TiN/Ti structure may be oxidized by oxygen gas which has moved along grain boundaries in the Pt film during the crystallization process of the ferroelectric material, as reported in the Extended Abstracts of the 43rd Spring Meeting (1996) of the Japanese Society of Applied Physics and the related Societies, 28p-V-6 (p. 500). Furthermore, as reported in the above publication as the article 28p-V-7, oxidation of TiN, if it occurs, may cause peeling at the Pt/TiN interface or hillocks in an upward direction within the Pt film so as to alleviate any variation in stress due to volume expansion resulting from the oxidation of TiN. This presents a considerable problem.
The aforementioned movement of oxide through the Pt film presents another problem in that, in the case where a closely contacting film is employed in a Pt/Ta/TiN/Ti structure or a Pt/Ti/TiN/Ti structure, an insulating material may be formed as a result of oxidation of the Ta or Ti immediately underlying the Pt, thereby disrupting the electrical connection. The lowermost Ti film is a requirement in these multi-layer structures to establish contact between the respective structure and polysilicon.
Thus, constructing an electrode only from a Pt film, or a combination of a Pt film and a closely contacting film can result in marked problems associated with hillocks and/or insufficient electrical contact due to the oxidation of a diffusion barrier film such as TiN. These problems make it difficult to realize stacked type structures.
On the other hand, the use of an oxide electrode material (e.g., IrO
2
, RuO
2
, RhO
2
, OSO
2
, and ReO
2
) for a lower electrode under the aforementioned oxide ferroelectric film has begun to be studied because they provide excellent barrier properties and excellent matching with an overlying oxide dielectric material.
Among others, the use of IrO
2
can greatly improve the fatigue characteristics of a layer of PZT formed upon an Ir/IrO
2
/polysilicon electrode or a Pt/IrO
2
/polysilicon electrode, as reported in Appl. Phys. Lett., vol. 65 (1994), pp. 1522-1524 and Jpn. J. Appl. Phys., vol. 33 (1994), pp. 5207-5210, which ascribes such improvement to the barrier properties of the IrO
2
film against the elements (e.g., Pb) composing the ferroelectric film. However, again such a structure is susceptible to the problem of insufficient electrical contact due to oxidation of the polysilicon at the IrO
2
/polysilicon interface, as well as silicidation of IrO
2
formed immediately above the polysilicon, during the IrO
2
film formation and the ferroelectric film formation.
An IrO
2
(1000Å)/Ir(500Å)/TiN/Ti lower electrode, incorporating a TiN film as a barrier metal for an oxide electrode (IrO
2
electrode), has been reported in the Extended Abstracts of the 43rd Spring Meeting (1996) of the Japanese Society of Applied Physics and the related Societies, 28p-V-4 (p. 499) for solving the problem associated with the reaction between Ir or IrO
2
and polysilicon. In this reference, contact characteristics between a silicon substrate having a reduced resistance due to ion implantation and a SrTiO
3
film serving as a high dielectric film was examined. As a result, it was confirmed that ohmic contact is established therebetween. More specifically, a leakage current density of about 10
−7
A/cm
2
and a dielectric constant of about 216 are reported to be obtained, both of these values being substantially equal to those obtainable for the Pt electrode. Such an IrO
2
/Ir/TiN/Ti structure prevents any degradation in electric characteristics of the capacitor which is associated with hillocks and reduced flatness typically c

Affiliated with

Also associated with

Rating

Semiconductor memory device and production method of the same does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device and production method of the same, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device and production method of the same will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2606713