Semiconductor memory device and portable electronic apparatus

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185280, C365S185290

Reexamination Certificate

active

07023731

ABSTRACT:
A semiconductor memory device including: a memory cell array in which memory cells are arranged; a plurality of terminals for accepting commands issued by an external user; a command interface circuit for interfacing between the external user and the memory cell array; a write state machine for controlling the programming and erasing operations; and an output circuit for outputting an internal signal to the plurality of terminals, wherein the memory cell includes a gate electrode formed over a semiconductor layer via a gate insulating film, a channel region disposed below the gate electrode, diffusion regions disposed on both sides of the channel region and having a conductive type opposite to that of the channel region, and memory functional elements formed on both sides of the gate electrode and having the function of retaining charges.

REFERENCES:
patent: 5424979 (1995-06-01), Morii
patent: 5463757 (1995-10-01), Fandrich et al.
patent: 5509134 (1996-04-01), Fandrich et al.
patent: 6046936 (2000-04-01), Tsujikawa et al.
patent: 6556479 (2003-04-01), Makuta et al.
patent: 6643725 (2003-11-01), Kozakai et al.
patent: 5-304277 (1993-11-01), None
Office Action mailed Jun. 1, 2005 for U.S. Appl. No. 10/851,709, filed May 20, 2004.

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