Semiconductor memory device and operation method thereof

Details Semiconductor memory device and operation method thereof Semiconductor memory device and operation method thereof

2011-08-09

2011-08-09

Le, Vu A (Department: 2824)

Static information storage and retrieval

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C365S233100, C365S227000, C365S194000, C365S233110, C365S233130

Reexamination Certificate

active

07995416

ABSTRACT:
A semiconductor memory device includes a clock synchronizing unit for receiving a first power voltage through a first power voltage terminal, and an additional power voltage providing unit for additionally providing a second power voltage to the first power voltage terminal for a predetermined period after leaving a power down mode.

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patent: 7821308 (2010-10-01), You
patent: 2003/0156462 (2003-08-01), Lim et al.
patent: 10-0206508 (1999-07-01), None
patent: 1020010006851 (2001-01-01), None
patent: 1020030014790 (2003-02-01), None
patent: 10-2006-0038603 (2006-05-01), None
Notice of Preliminary Rejection issued from Korean Intellectual Property Office on Apr. 28, 2009 with an English Translation.
Notice of Allowance issued from Korean Intellectual Property Office on Nov. 16, 2009.

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