Semiconductor memory device and method of manufacturing...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices

Reexamination Certificate

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C257S692000, C257S725000, C438S268000, C438S275000, C438S286000

Reexamination Certificate

active

06879036

ABSTRACT:
A semiconductor memory device for use in a semiconductor device with a chip on chip structure, which enables a memory specification to be selected and fixed, and improves design and production efficiencies. Bonding bumps corresponding to an input terminal and an output terminal of an interface circuit are connected to bonding bumps provided on another semiconductor device. Then, a polarity of a potential on a bus width varying terminal is fixed by the bonding bump provided on another semiconductor device, so that an isolated input/output specification is selected as a bus specification of the interface circuit and a bus width is selected.

REFERENCES:
patent: 5332922 (1994-07-01), Oguchi et al.
patent: 5474957 (1995-12-01), Urushima
patent: 5701031 (1997-12-01), Oguchi et al.
patent: 6208547 (2001-03-01), Ooishi
patent: 6831294 (2004-12-01), Nishimura et al.

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