Semiconductor memory device and method of forming the same

Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – Having specific type of active device

Reexamination Certificate

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Details

C257S903000, C257S390000, C257S369000, C438S275000, C438S981000

Reexamination Certificate

active

06674105

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor memory device and a method of forming the same, and more particularly to a static random access memory having unloaded 4 Tr complementary MOS static random access memory cells.
In order to increase the degree of integration of the 4 Tr complementary MOS static random access memory cell, it is required to scale down the MOS field effect transistors of the memory cells.
Scaling down the MOS field effect transistors causes the following two problems.
The first problem is that shortening the gate length causes a drain induced barrier lowering phenomenon whereby a stand-by current is increased.
The second problem is that reduction in thickness of the gate oxide film causes an increase in gate direct tunnel current whereby the stand-by current is increased.
In the above circumstance, it had been required to develop a novel semiconductor memory device and method of forming the same free from the above problem.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a novel semiconductor memory device free from the above problems.
It is a further object of the present invention to provide a novel method of forming a semiconductor memory device.
In accordance with the present invention, the gate length and the gate insulation film thickness are different between the p-channel MOS field effect transistors serving as the driver gates and the n-channel MOS field effect transistors forming the flip flop. Namely, the p-channel MOS field effect transistors serving as the driver gates have a larger gate length and a smaller gate oxide film thickness than the n-channel MOS field effect transistors forming the flip flop.
The above and other objects, features and advantages of the present invention will be apparent from the following descriptions.


REFERENCES:
patent: 4866002 (1989-09-01), Shizukuishi et al.
patent: 5330929 (1994-07-01), Pfiester et al.
patent: 5426065 (1995-06-01), Chan et al.
patent: 5555208 (1996-09-01), Nishihara
patent: 5827761 (1998-10-01), Fulford, Jr. et al.
patent: 6044011 (2000-03-01), Marr et al.
patent: 0 157 926 (1985-10-01), None
patent: 0 445 836 (1991-09-01), None
patent: 53-68991 (1978-06-01), None
patent: 56-51088 (1981-05-01), None
patent: 59-172194 (1984-09-01), None
patent: 60-254653 (1985-12-01), None
patent: 60-254653 (1985-12-01), None
patent: 10-116921 (1998-05-01), None
Sasaki, Isao. “Micro-CMOS Process, Constituting 256KB SRAM,” inDenshi Zairyo, vol. 24, No. 6, 1985, pp. 35-39.

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