Semiconductor memory device and method for writing data therein

Details Semiconductor memory device and method for writing data therein Semiconductor memory device and method for writing data therein

1994-09-19

1996-01-23

Nelms, David C.

Static information storage and retrieval

Floating gate

Particular biasing

36518901, 36518904, 36518516, G11C 700, G11C 11409

Patent

active

054870348

ABSTRACT:
A method for writing data into a memory transistor having a floating gate includes applying a first voltage to a control gate electrode of memory transistor and applying a second voltage to both the source and the drain electrodes of memory transistor, the second voltage being lower than the first voltage. Data is written to the memory transistor by electrons injected into the floating gate due to the F-N tunnel effect. EEPROM comprises a simultaneous-write control circuit for controlling X-address decoder and Y-address decoder so as to simultaneously select all of word lines and all of bit lines, and a source switching circuit for applying a potential equal to the drain potential to the source electrode. All of memory transistors undergo a simultaneous write operation without utilizing a channel current, so that the current consumption can be reduced in the writing operation. Further, the amount of time for pre-erasure writing operation can be reduced for a higher speed in operation of the EEPROM.

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R. Shirota et al., "An Accurate Model of Subbreakdown Due to Band-to-Band Tunneling and Its Application", IEDM 88, pp. 26-29.

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