Semiconductor memory device and method for operating the same

Details Semiconductor memory device and method for operating the same Semiconductor memory device and method for operating the same

2011-01-04

2011-01-04

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S233120, C365S191000, C365S189050, C365S189070

Reexamination Certificate

active

07864624

ABSTRACT:
A semiconductor memory device includes a first buffering unit configured to buffer a first clock for an address signal and a command to be input in synchronization with the first clock, a second buffering unit configured to buffer a second clock for a data signal to be in synchronization with the second clock to output a buffered second clock having the same frequency as the first clock, a data output circuit configured to output an internal data in response to the buffered second clock, a delay unit configured to delay the buffered second clock by a predetermined time, and a phase detector configured to detect a phase difference of an output clock of the delay unit and the output clock of the first buffering unit, and to output the detection result.

REFERENCES:
patent: 6407608 (2002-06-01), Brown et al.
patent: 7209397 (2007-04-01), Ware et al.
patent: 2002-0031833 (2002-05-01), None
patent: 2002-0043930 (2002-06-01), None

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