Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2011-07-05
2011-07-05
Nguyen, VanThu (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185170, C365S185180, C365S185290, C365S185300
Reexamination Certificate
active
07974130
ABSTRACT:
A semiconductor memory device including a memory cell array with NAND cell units arranged therein, the NAND cell unit having a plurality of electrically rewritable and non-volatile memory cells connected in series, first and second select gate transistors disposed for coupling the both ends of the NAND cell unit to a bit line and a source line, respectively, and a dummy cell disposed adjacent to at least one of the first and second select gate transistors, wherein after erasing the memory cells in an erase unit, the memory cells excepting the dummy cell are subject to soft-program.
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Hosono Koji
Nakamura Dai
Kabushiki Kaisha Toshiba
Nguyen Vanthu
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
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