Semiconductor memory device and method for driving the same

Static information storage and retrieval – Addressing – Sync/clocking

Reexamination Certificate

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C365S193000, C365S194000

Reexamination Certificate

active

08036062

ABSTRACT:
A semiconductor memory device includes: a modulation controller for generating a modulation control signal for controlling a frequency modulation operation; a delay locked loop (DLL) circuit for performing a delay locking operation to generate first and second DLL clocks and outputting a frequency-modulated DLL clock in response to the modulation control signal; and a data strobe signal generator for outputting the frequency-modulated DLL clock as a data strobe signal.

REFERENCES:
patent: 7038971 (2006-05-01), Chung
patent: 7652937 (2010-01-01), Searles et al.
patent: 7697370 (2010-04-01), Choi
patent: 2001/0030903 (2001-10-01), Kuge et al.
patent: 2004/0052152 (2004-03-01), Kono
patent: 2009/0257294 (2009-10-01), Searles et al.
patent: 2010/0135100 (2010-06-01), Chiu
patent: 2010/0208535 (2010-08-01), Fujisawa
patent: 2010/0271886 (2010-10-01), Park et al.
patent: 2011/0002181 (2011-01-01), Rhee et al.

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