Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2011-05-03
2011-05-03
Nguyen, Tuan T. (Department: 2824)
Static information storage and retrieval
Addressing
Sync/clocking
C365S194000, C365S193000, C365S189070
Reexamination Certificate
active
07936635
ABSTRACT:
A semiconductor memory device includes: a modulation controller for generating a modulation control signal for controlling a frequency modulation operation; a delay locked loop (DLL) circuit for performing a delay locking operation to generate first and second DLL clocks and outputting a frequency-modulated DLL clock in response to the modulation control signal; and a data strobe signal generator for outputting the frequency-modulated DLL clock as a data strobe signal.
REFERENCES:
patent: 7038971 (2006-05-01), Chung
patent: 7697370 (2010-04-01), Choi
patent: 2001/0030903 (2001-10-01), Kuge et al.
patent: 2004/0052152 (2004-03-01), Kono
patent: 2010/0208535 (2010-08-01), Fujisawa
patent: 2010/0271886 (2010-10-01), Park et al.
Kim Kyoung-Nam
Shin Yoon-Jae
Hynix / Semiconductor Inc.
IP & T Group LLP
Nguyen Tuan T.
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