Semiconductor memory device and method for controlling the same

Details Semiconductor memory device and method for controlling the same Semiconductor memory device and method for controlling the same

2007-08-28

2007-08-28

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Addressing

Sync/clocking

C365S233500

Reexamination Certificate

active

11327247

ABSTRACT:
A control unit for a semiconductor memory device, a semiconductor memory device and a method for controlling the same. The control unit of a semiconductor memory device includes control signal circuits, each control signal circuit to receive a master signal and to generate at least one of a plurality of control signals in response to the master signal, each of the plurality of core control signals to be generated after a delay specific to the core control signals after a transition of the master signal, the plurality of control signals to control the semiconductor memory device.

REFERENCES:
patent: 5548560 (1996-08-01), Stephens et al.
patent: 5835448 (1998-11-01), Ohtani et al.
patent: 6055207 (2000-04-01), Nam
patent: 6185151 (2001-02-01), Cho
patent: 7075854 (2006-07-01), Lee et al.

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