Semiconductor memory device and manufacturing method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Bulk effect device – Bulk effect switching in amorphous material

Reexamination Certificate

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C257S003000, C257S002000, C257SE31029, C365S158000, C365S171000, C438S666000

Reexamination Certificate

active

07868312

ABSTRACT:
A semiconductor memory device is provided in which a phase-change layer can be formed stably and electric current required to cause the phase change of the phase-change layer can be reduced. An edge portion of the phase-change layer is formed above a lower electrode. The edge portion is formed to assume a tapered shape in cross section such that the thickness of the phase-change layer varies above the contact area between the lower electrode and the phase-change layer. The tapered portion is filled with an oxide film. According to this configuration, the region in which the phase-change occurs can be restricted, and hence the phase-change layer can be heated efficiently, resulting in reduction of electric current required for heating.

REFERENCES:
patent: 6114713 (2000-09-01), Zahorik
patent: 6150253 (2000-11-01), Doan et al.
patent: 2004/0012009 (2004-01-01), Casagrande et al.
E. Varesi, A. Modelli, P. Besana, T. Marangon, F. Pellizzer, A.Pirovano, R. Bez, “Advances in Phase Technology”, EPCOS 2004 Conf. Proceedings.
S. Hudgens, B. Johnson, “Overview of Phase-Change Chalcogenide Nonvolatile Memory Technology”, MRS Bulletin, Nov. 2004.

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