Semiconductor memory device and manufacturing method thereof

Details Semiconductor memory device and manufacturing method thereof Semiconductor memory device and manufacturing method thereof

1990-05-15

1991-07-16

Prenty, Mark

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 12, 357 4, 357 51, 365175, 365176, 365182, H01L 2702, H01L 2988, H01L 2712, G11C 1134

Patent

active

050328913

ABSTRACT:
Disclosed is a semiconductor memory device comprising an SOI substrate in which a semiconductor film is formed on a semiconductor substrate with an insulating film interposed therebetween. A memory cell structure is formed by a switching MOS transistor formed in the SOI substrate and an Esaki diode is positioned on the MOS transistor. The memory device also comprises a memory cell provided with a plurality of tunnel diodes connected to one of the impurity regions constituting the FET formed in the semiconductor substrate, and another memory cell provided with an Esaki diode formed in an self-alignment by a solid phase diffusion. In manufacturing the semiconductor memory device, the MOS transistor and the Esaki diode, which collectively form a memory cell, are integratedly formed one upon the other. The MOS transistor is formed in a semiconductor substrate using an SOI structure so as to prepare a memory cell which does not include a parasitic pn-junction.

REFERENCES:
patent: 4573143 (1986-02-01), Matsukawa
Digest of 1982 Symposium on VLSI Technology, pp. 10-11, Sep. 1-3, 1982, by Izumi et al.

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