Semiconductor memory device and its fabrication method

Details Semiconductor memory device and its fabrication method Semiconductor memory device and its fabrication method

1994-01-03

1995-01-17

Fears, Terrell W.

Electricity: electrical systems and devices

Control circuits for electromagnetic devices

Systems for magnetizing, demagnetizing, or controlling the...

36518901, G11C 1124

Patent

active

053831527

ABSTRACT:
A semiconductor memory device having stacked-capacitor type memory cells, each of which contains an MOS transistor and a storage capacitor. The capacitor has a first opposed electrode having a recess at its upper face, which is formed through an inter-layer insulation film on the substrate, a first insulation film which covers a surface of the first opposed electrode, a charge storage electrode formed in the recess of the first opposed electrode and contacted with the source region of the transistor through a contact hole of the inter-layer insulation film, a second insulation film which covers a surface of the charge storage electrode, and a second opposed electrode formed on the second insulation film. The charge storage electrodes do not broken in the fabrication sequence of the device. Even if the charge storage electrodes are sheered off in positioning to the corresponding contact holes, the inter-layer insulation film is disadvantageously etched.

REFERENCES:
patent: 4812898 (1989-03-01), Sumihiro

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