Semiconductor memory device and high-voltage switching circuit

Details Semiconductor memory device and high-voltage switching circuit Semiconductor memory device and high-voltage switching circuit

1998-10-08

1999-06-01

Nguyen, Tan T.

Static information storage and retrieval

Floating gate

Particular biasing

365201, G11C 1600

Patent

active

059093986

ABSTRACT:
A semiconductor memory device comprises an array of electrically rewritable memory cells which are arranged in a matrix, erasing section for applying an erasing voltage to the memory cells to effect erasing, and writing section for applying a writing voltage to the memory cells to effect writing, wherein in the erasing section and writing section, either MOS transistors to which a voltage higher than the erasing voltage and writing voltage is applied or MOS transistors which transfer a voltage higher than the erasing voltage and writing voltage contain MOS transistors which are in a weak inversion state or an inversion state with their substrate bias voltage, gate voltage and source voltage at 0 V.

REFERENCES:
patent: 5155701 (1992-10-01), Komori et al.
patent: 5245572 (1993-09-01), Kosonocky et al.
patent: 5313429 (1994-05-01), Chevallier et al.
patent: 5402382 (1995-03-01), Miyawaki et al.
patent: 5627780 (1997-05-01), Malhi
patent: 5627838 (1997-05-01), Lin et al.
patent: 5790459 (1998-08-01), Roohparvar

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