Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2006-12-29
2009-02-10
Lam, David (Department: 2827)
Static information storage and retrieval
Addressing
Sync/clocking
C365S194000, C365S189050
Reexamination Certificate
active
07489586
ABSTRACT:
A semiconductor memory device includes: a variable delay for delaying a delay locked loop (DLL) clock by a predetermined delay time to output a delayed DLL clock; an output driver for outputting data and data strobe signal in response to the delayed DLL clock; and a calibration controller for controlling the predetermined delay time of the variable delay in response to output AC parameters.
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patent: 6996026 (2006-02-01), Brox et al.
patent: 7171321 (2007-01-01), Best
patent: 10-2005-0020359 (2005-03-01), None
patent: 10-2005-0048755 (2005-05-01), None
patent: 10-2005-0109813 (2005-11-01), None
Korean Notice of Allowance issued in Korean Patent Application No. KR 10-2006-0059735, dated Apr. 29, 2008.
Oh Young-Hoon
Rho Kwang-Myoung
Hynix / Semiconductor Inc.
Lam David
McDermott Will & Emery LLP
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