Semiconductor memory device and driving method thereof

Details Semiconductor memory device and driving method thereof Semiconductor memory device and driving method thereof

2009-06-24

2011-12-20

Hidalgo, Fernando (Department: 2827)

Static information storage and retrieval

Addressing

Sync/clocking

C365S189040, C365S189140, C365S189150, C365S189160, C365S189170, C365S189050, C365S189070, C365S233110, C365S233120, C365S233160, C365S233170, C365S233190, C365S236000

Reexamination Certificate

active

08081538

ABSTRACT:
A semiconductor memory device includes output enable signal generation means configured to be reset in response to an output enable reset signal, count a DLL clock signal and an external clock signal, and generate an output enable signal in correspondence to a read command and an operating frequency; and activation signal generation means configured to generate an activation signal for inactivating the output enable signal generation means during a write operation interval.

REFERENCES:
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patent: WO2009037770 (2009-03-01), None

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