Semiconductor memory device and a data path using the same

Details Semiconductor memory device and a data path using the same Semiconductor memory device and a data path using the same

1989-02-24

1992-02-18

Bowler, Alyssa H.

Static information storage and retrieval

Format or disposition of elements

365 63, 36518904, 36523004, 36523005, G11C 700, G11C 502, G11C 506

Patent

active

050899929

ABSTRACT:
A semiconductor memory device has multiple ports for enabling writing and reading of data simultaneously. A memory cell array comprises a plurality of memory cells (1) arranged in rows and in columns, write and read word lines (WW, RW) being connected to the memory cells of the respective rows and write and read bit lines (WB, RB) being connected to the memory cells of the respective columns. Data is inputted to the write bit lines (WB) from an input terminal (DI) through a write circuit (3i) and data read out form the corresponding memory cells are outputted to an output terminal (DO) through a sense amplifier (4i). A first port is formed by the write word line, the write bit line and the input terminal, while a second part is formed by the read word line, the read bit line and the output terminal.

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"The AM2900 Family Data Book with Related Support Circuits" Advanced Micro Devices, Inc. (1979).

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