Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2011-08-09

2011-08-09

Tran, Minh-Loan T (Department: 2826)

Static information storage and retrieval

Read only systems

Semiconductive

C257S296000, C257SE29170, C257SE29255, C365S174000, C365S175000, C365S182000, C365S186000, C365S104000, C365S105000, C365S094000

Reexamination Certificate

active

07995369

ABSTRACT:
This disclosure concerns a semiconductor memory device including bit lines; word lines; semiconductor layers arranged to correspond to crosspoints of the bit lines and the word lines; bit line contacts connecting between a first surface region and the bit lines, the first surface region being a part of a surface region of the semiconductor layers directed to the word lines and the bit lines; and a word-line insulating film formed on a second surface region adjacent to the first surface region, the second surface region being a part of out of the surface region, the word-line insulating film electrically insulating the semiconductor layer and the word line, wherein the semiconductor layer, the word line and the word-line insulating film form a capacitor, and when a potential difference is given between the word line and the bit line, the word-line insulating film is broken in order to store data.

REFERENCES:
patent: 7265419 (2007-09-01), Minami
patent: 2003/0206467 (2003-11-01), Peng et al.
patent: 2006/0244099 (2006-11-01), Kurjanowicz
patent: 2008/0111187 (2008-05-01), Minami
Matthew Crowley, et al., “512Mb PROM with 8 Layers of Antifuse/Diode Cells”, 2003 IEEE International Solid-State Circuits Conference Digest of Technical Papers, 4 pages.
Feng Li, et al., “Evaluation of SiO2 Antifuse in a 3D-OTP Memory”, IEEE Transactions on Device and Materials Reliability, vol. 4, No. 3, Sep. 2004, pp. 416-421.
S. B. Herner, et al., “Vertical p-i-n Polysilicon Diode With Antifuse for Stackable Field-Programmable ROM”, IEEE Electron Device Letters, vol. 25, No. 5, May 2004, pp. 271-273.
Hiroshi Ito, et al., “Pure CMOS One-time Programmable Memory using Gate-Ox Anti-fuse”, IEEE 2004 Custom Integrated Circuits Conference, pp. 469-472.

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