Semiconductor memory device

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Reexamination Certificate

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Details

C365S189080, C365S189011, C365S230010

Reexamination Certificate

active

08009505

ABSTRACT:
A semiconductor memory device includes a row control circuit block and a column control circuit block each performing an access control over a memory cell array, a data I/O circuit block transmitting and receiving data to and from the memory cell array, and a control circuit changing at least a part of the row control circuit block, the column control circuit block, and the data I/O circuit block from a standby state into an active state in response to a setting of a predetermined mode signal to a mode register. According to the present invention, even if it is necessary to turn predetermined circuit blocks into the active state by an operation other than a read or write operation, there is no need to always set these circuit blocks into the active state.

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