Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2011-01-18

2011-01-18

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Interconnection arrangements

C365S072000, C365S196000, C365S205000, C365S104000

Reexamination Certificate

active

07872893

ABSTRACT:
A semiconductor memory device having a hierarchical bit line structure includes memory cells and an amplification circuit for amplifying a signal read from one of the memory cells via a bit line. A cell N-well region in which the P-channel transistors of the memory cell are formed and an amplification-circuit N-well region in which the P-channel transistors of the amplification circuit are formed are formed continuously.

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