Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2011-03-29
2011-03-29
Le, Vu A (Department: 2824)
Static information storage and retrieval
Floating gate
Multiple values
C365S189050, C365S230030
Reexamination Certificate
active
07916534
ABSTRACT:
A semiconductor memory device of the invention comprises a memory cell array which includes a first region that has a plurality of memory cells each capable of storing n-bit data (n is a natural number) and a second region that has a plurality of memory cells each capable of storing k-bit data (k>n: k is a natural number), a data storage circuit which includes a plurality of data caches, and a control circuit which controls the memory cell array and the data storage circuit in such a manner that the k-bit data read from the k
number of memory cells in the first region are stored into the data storage circuit and the k-bit data are stored into the memory cells in the second region.
REFERENCES:
patent: 5930167 (1999-07-01), Lee et al.
patent: 6122193 (2000-09-01), Shibata et al.
patent: 6496409 (2002-12-01), Kobayashi et al.
patent: 6933194 (2005-08-01), Narita et al.
patent: 2006/0227602 (2006-10-01), Honma et al.
patent: 2007/0211530 (2007-09-01), Nakano
patent: 2008/0104309 (2008-05-01), Cheon et al.
patent: 2002-16154 (2002-01-01), None
U.S. Appl. No. 12/060,630, filed Apr. 1, 2008, Tanaka.
U.S. Appl. No. 12/840,567, filed Jul. 21, 2010, Shibata, et al.
Shibata Noboru
Shimizu Takahiro
Kabushiki Kaisha Toshiba
Le Vu A
Oblon, Spivak McClelland, Maier & Neustadt, L.L.P.
Yang Han
LandOfFree
Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2661164