Semiconductor memory device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

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Details

C257S784000, C257SE23141

Reexamination Certificate

active

07880312

ABSTRACT:
A plurality of semiconductor memory chips are stacked on a first main surface of a wiring board, and an interposer chip is stacked on the plurality of semiconductor chips, and a semiconductor controller chip is stacked on the interposer chip. The plurality of semiconductor memory chips are independently and electrically connected with inner connecting terminals formed on the wiring board, respectively, and independently controlled by the semiconductor controller chip which is electrically connected with another inner connecting terminals formed on the wiring board via the interposer chip.

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patent: 5812814 (1998-09-01), Sukegawa
patent: 6650009 (2003-11-01), Her et al.
patent: 6979905 (2005-12-01), Nishida et al.
patent: 7009303 (2006-03-01), Kuroda et al.
patent: 7327038 (2008-02-01), Kwon et al.
patent: 2006/0157866 (2006-07-01), Le et al.
patent: 2006/0175715 (2006-08-01), Hirose et al.
patent: 2007/0170573 (2007-07-01), Kuroda et al.
patent: 2007/0218588 (2007-09-01), Takiar et al.
patent: 2009/0200680 (2009-08-01), Shinohara et al.
patent: 0 613 151 (1994-08-01), None
patent: 7-78056 (1995-03-01), None

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