Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1985-10-16

1987-11-24

Fears, Terrell W.

Static information storage and retrieval

Powering

365189, G11C 1140

Patent

active

047093544

ABSTRACT:
A semiconductor memory device includes a plurality of memory cell rows each including a plurality of memory cells; a plurality of row selection signal lines each for transmitting a row selection signal to the memory cells of each memory cell row; and a row decoder for giving a row selection signal to the row selection signal line connected to the memory cells on a memory cell row in accordance with the row address input externally, wherein the row selection signal is at a power supply voltage level during a reading-out period, an intermediate voltage level between the power supply voltage and a ground level during the writing-in period, and the ground level at periods other than the writing-in and reading-out periods.

REFERENCES:
A 64Kb CMOS RAM, by Satoshi Konishi et al., ISSCC Digest of Technical Papers (1982).
A 20ns 64K CMOS SRAM, by Osamu Minato et al., ISSCC Digest of Technical Papers (1984).

Affiliated with

Also associated with

Rating

Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2425405