Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1999-03-19

2000-04-18

Nelms, David

Static information storage and retrieval

Interconnection arrangements

365 52, 36523006, G11C 506

Patent

active

060523018

ABSTRACT:
According to the present invention, the main word lines arranged in a row direction have a linear pattern shape, and in the region where sub word decoder circuits are formed, the pattern of the main word lines has a shape whereby the pattern branches and splits into a plurality of lines and then reconverges, in the direction of the row. In the region where the line splits, relatively small island-shaped patterns of the conducting layer are located, forming nodes which have a difference electric potential from the main word lines. The main word lines are constituted by a first metal conducting layer, similarly to the prior art. In other words, small island-shaped metal layer patterns, which are electrically different from the main word lines are formed inside the conducting metal layer pattern constituting the main word lines, similarly to island formed in the middle of a river, for example.

REFERENCES:
patent: 4779227 (1988-10-01), Kurafuji et al.
patent: 5449934 (1995-09-01), Shono et al.
patent: 5572480 (1996-11-01), Ikeda et al.
patent: 5875149 (1999-02-01), Oh et al.
patent: 5996340 (1999-10-01), Fujini et al.

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