Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1995-05-12

1999-04-20

Tran, Toan

Static information storage and retrieval

Powering

327 57, G11C 1140

Patent

active

058963200

ABSTRACT:
A semiconductor memory device comprises a bit line, a memory cell connected to the bit line, a sense amplifier, a power source for providing a first voltage to the sense amplifier as an operational power source voltage, a MOS transistor connected between the sense amplifier and the bit line and a stabilized power source for providing to a gate electrode of the MOS transistor a second voltage lower than the first voltage, so that a restore voltage of the memory cell is determined by the source voltage of the MOS transistor.

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Fujii et al., "A 45 ns 16Mb DRAM With Triple-Well Structure", IEEE International Solid-State Circuits Conference, Feb. 1989, vol. 32, pp. 248-249, 354.
Kitsukawa et al., "A 1-Mbit BiCOMS DRAM Using Temperature-Compensation Circuit Techniques", IEEE Journal of Solid-State Circuits, Jun. 1989, vol. 24, No. 3, pp. 597-602.
Furuyama et al., "A New On-Chip Voltage Converter for Submicrometer High-Density DRAM'S", IEEE Journal of Solid-State Circuits, Jun. 1987, vol. 22, No. 3, pp. 437-441.

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