Semiconductor memory device

Static information storage and retrieval – Floating gate – Multiple values

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Details

36518517, 36518523, G11C 1604

Patent

active

06125052&

ABSTRACT:
A word line controller selects a word line in a memory cell array and applies a voltage necessary for a read, write, or erase to the selected word line. The memory cell array, a bit line controller, a column decoder, a data I/O buffer, the word line controller, and a data detector are controlled by a control signal/control voltage generator. The control signal/control voltage generator includes a read/verify voltage generator. The voltage of the selected word line (WL) upon a read or write verify that is generated by the control signal/control voltage generator is adjusted in accordance with the common source line voltage of the memory cell array.

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patent: 5426608 (1995-06-01), Higashitani
patent: 5596526 (1997-01-01), Assar et al.
patent: 5617353 (1997-04-01), Lim et al.
patent: 5696717 (1997-12-01), Koh
patent: 5729491 (1998-03-01), Kim et al.

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