Semiconductor memory device

Fishing – trapping – and vermin destroying

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437 47, 437 60, 437919, H01L 2170

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active

053148355

ABSTRACT:
A semiconductor memory device includes a plurality of memory cells each including a transistor formed on a surface of a semiconductor substrate and having one terminal, and a capacitor formed on the semiconductor substrate and having first and second electrodes, with the first electrode being connected with one terminal of the transistor. The first electrode of the capacitor includes of a principal portion of either a generally rectangular cubic configuration or a generally cup-shaped configuration, a peripheral portion spaced from and surrounding a peripheral side wall of the principal portion and a bottom portion connecting an end of the principal portion with an end of the peripheral portion. On the other hand, the second electrode of the capacitor is includes of respective portions confronting the principal portion, the peripheral portion and the bottom portion of the first electrode.

REFERENCES:
patent: 5047817 (1991-09-01), Wakamiya
patent: 5140389 (1992-08-01), Kimura
"A Novel Storage Capacitance Enlargement Structure Using Double Stacked Storage Node in STC DRAM Cells" Ex. Abstracts 20th Int. Conf. on Solid State Devices and Materials, Tokyo, 1988 pp. 581-584.
Novel Stacked Capacitor Cell for 64 Ml DRAM. VLSI Technology Symposium 1987, Kyoto, pp. 69-70.
"Stacked Capacitor Cells for High-Density Dynamic RAMs" ULSI Research Center, IEDM 88, pp. 600-664.
"A New Stacked Capacitor DRAM Cell Characterized by a Storage Capacitor on a Bit-Line Structure" IEDM 88.
"3-Dimensional Stacked Capacitor Cell for 16M and 64M DRAMS" IEDM 88, pp 592-595.

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