Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1993-06-30

1995-02-21

Yoo, Do Hyun

Static information storage and retrieval

Floating gate

Particular biasing

36518901, 36518906, G11C 1134

Patent

active

053922360

ABSTRACT:
In a flash EEPROM, a write voltage setting circuit is configured to generate an output voltage having a positive temperature characteristics to a gate of a write control MOSFET. Thus, even if the current drive power of the write control MOSFET is decreased because the temperature elevation, the decrease of the current drive power is compensated for by the increased gate voltage of the write control MOSFET, and even if the current drive power of the write control MOSFET is increased because the temperature drop, the increase of the current drive power of the write control MOSFET is compensated for by the decreased gate voltage of the write control MOSFET. Thus, even if the temperature changes, the write voltage V.sub.D applied to a drain of a memory cell in the write mode can be maintained in a range near to a designed value, and accordingly, the temperature margin of the writing characteristics becomes larger.

REFERENCES:
patent: 4769787 (1988-09-01), Furusawa et al.
patent: 5262984 (1993-11-01), Noguchi et al.
patent: 5265062 (1993-11-01), Lee

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