Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1988-07-28

1990-07-03

Popek, Joseph A.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523006, G11C 1134

Patent

active

049396960

ABSTRACT:
A semiconductor memory device comprising a decoder circuit for selecting one divided word line from among a plurality of divided word lines; the decoder circuit including a first drive MOSFET which is arranged so as to be shared by a plurality of memory blocks each having the divided word lines with memory cells respectively coupled thereto and which receives signals to be supplied to main word lines, second drive MOSFETs which are respectively coupled to the first MOSFET in series so as to share it and which receive respective predecode signals corresponding to the plurality of divided word lines, a plurality of load means which are respectively coupled to drains of the second drive MOSFETs, and inverter circuits which invert phases of drain output signals of the respective second drive MOSFETs and transmit the inverted signals to the corresponding divided word lines.

REFERENCES:
patent: 4264828 (1981-04-01), Perlegos et al.
patent: 4393472 (1983-07-01), Shimada et al.

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