Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1992-08-31
1994-01-11
Jackson, Jerome
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257771, 257765, 257750, H01L23248, H01L 2946, H01L 2952, H01L 2964
Patent
active
052784495
ABSTRACT:
In this semiconductor device, contact holes extending from a lower interconnection layer containing diffusion layers at the surface of a Si substrate to an Al-involved interconnection layer formed above the Sis substrate through the intermediation of an interlayer dielectric film are filled with Al alloy having a eutectic point lower than that of Al-Si alloy. Then, for example, an Al-Ge alloy is sputtered, reflowed and allowed to react with the Si film to convert into an Al-Ge-Si alloy. At the stage of forming the Al-Ge-Si alloy, the reflow ceases. This brings the reduction of junction leakage current from the diffusion layers. Similarly in the case of a high aspect ratio of contact hole, this technique enables the contact hole to be fully filled with the above-mentioned Al alloy. Besides this technique enables direct interconnections in multilayer Al-involved interconnection structure of between an upper-layer Al-involved interconnection and diffusion layers, contributing to reduction of area required for interconnections.
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patent: 3902936 (1975-09-01), Price
patent: 4538344 (1985-09-01), Okumura et al.
Planarized Aluminum Metallization for Sub-0.5 .mu.m CMOS Technology, 1990 IEEE, IEDM 90, pp. 51-54, by F. S. Chen, et al.
Arroyo T. M.
Jackson Jerome
NEC Corporation
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