Semiconductor memory device

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Details

357 23, 357 45, H01L 2978, H01L 2710

Patent

active

040620379

ABSTRACT:
A semiconductor memory device, which comprises: a P-type semiconductor material comprising on the surface thereof, an N-type doped layer, one surface region of the substrate adjoining the doped layer being used as a gate region, and further comprising in the interior thereof an N-type buried layer below another surface region of said substrate adjoining said one surface region. Electric charges representing information are stored in the buried layer. The reading time and the refreshing period are improved by shortening said reading time and lengthening said refreshing time utilization of said N-type buried layer.

REFERENCES:
patent: 3997799 (1976-12-01), Baker

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