Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1990-05-22

1991-08-13

Fears, Terrell W.

Static information storage and retrieval

Format or disposition of elements

365 63, G11C 1300, G11C 506

Patent

active

050401432

ABSTRACT:
First and second supply lines are connected to some or all of a plurality of memory cells included in a memory cell array. Only the first supply line is connected to the remaining memory cells. When a voltage of H level is supplied to the first and second supply lines, all memory cells function as SRAM memory cells in which stored information can be rewritten. Meanwhile when H level is applied to the first supply line and L level is applied to the second supply lines, memory cells to which both the first and second supply lines are connected are set to a state in which information of the logic "1" or "0" is fixedly stored. Namely, they function as ROM memory cells. At this time, the remaining member cells to which only the first supply line is connected function as SRAM memory cells. In this manner, by switching the voltages applied to the second supply line, some or all of the memory cell arrays function as SRAM or ROM.

REFERENCES:
patent: 4964078 (1990-10-01), Jandu et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1532289