Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1998-04-16

2000-07-04

Phan, Trong

Static information storage and retrieval

Addressing

Plural blocks or banks

365 51, 365 63, 365207, G11C 800, G11C 502, G11C 506, G11C 702

Patent

active

060848162

ABSTRACT:
A semiconductor memory device includes a memory cell array having memory cells arranged in rows and columns. Bit lines are coupled to the memory cells in corresponding columns and word lines are arranged to be substantially orthogonal to the bit lines, each word line coupled to the memory cells in a corresponding row. The memory cell array is divided into an odd number of sub-arrays which are spaced apart from each other in the word line direction. No bit lines and no memory cells are formed in the spaces between the sub-arrays.

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