Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1992-11-19

1994-04-19

LaRoche, Eugene R.

Static information storage and retrieval

Addressing

Byte or page addressing

36518905, 3652335, G11C 800

Patent

active

053052846

ABSTRACT:
A semiconductor memory having a page mode includes a first circuit for reading out page data from a memory cell array, in accordance with cell address signals A3-A19, and a second circuit for latching, at the beginning of a page mode cycle, page data to be read out in the cycle, sequentially outputting the latched data in page address signals A0-A2, and inputting to the first circuit an address from which to read out page data to be output in a following page mode cycle. By provision of the first and second circuits, the period of time from a change in address to output of read-out data can be shortened considerably, permitting high-speed reading in the page mode.

REFERENCES:
patent: 4567579 (1986-01-01), Patel
patent: 5088062 (1992-02-01), Shikata
patent: 5134583 (1992-07-01), Matsuo
patent: 5214609 (1993-05-01), Kato

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