Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1989-10-10

1991-06-18

Popek, Joseph A.

Static information storage and retrieval

Addressing

Sync/clocking

36518911, 365201, G11C 700

Patent

active

050254227

ABSTRACT:
A static random access memory device is provided with an internal activation signal generator and circuit means for overriding application of the internal activation signals to the memory circuit under predetermined circumstances. In normal read/write operation modes, word lines and a sense amplifier are activated only during a predetermined period in response to the internal activation signals in order to reduce power consumption. On the other hand, in a test mode, since the circuit means detects a higher voltage level of a predetermined external terminal of the device, the internal activation signals from the pulse generator are not used to limit the operating time of the word lines and sense amplifier. Therefore, during the test mode, the word lines and the sense amplifier are activated for a longer period than during the normal read/write operation mode. Because of this, the device is able to shorten aging time which occurs in the test mode.

REFERENCES:
patent: 4272832 (1981-06-01), Ito
patent: 4633442 (1986-12-01), Borghese

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