Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Patent
1995-02-14
1996-10-15
Nguyen, Tan T.
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
365200, 365 96, 3652257, G11C 800
Patent
active
055661289
ABSTRACT:
A memory has a first bit line pair, a second bit line pair, a third bit line pair, a first data line pair, a second data line pair, a first transistor pair connecting the first bit line pair to the first data line pair, a second transistor pair connecting the second bit line pair to the second data line pair, a third transistor pair connecting the third bit line pair to the first data line pair, a fourth transistor pair connecting the third bit line pair to the second data line pair, a first selection line connected to the first transistor pair for switching ON/OFF of the first transistor pair, a second selection line connected to the second transistor pair for switching ON/OFF of the second transistor pair, a third selection line connected to the third transistor pair for switching ON/OFF of the third transistor pair, and a fourth selection line connected to the fourth transistor pair for switching ON/OFF of the fourth transistor pair.
REFERENCES:
patent: 5134583 (1992-06-01), Matsuo et al.
patent: 5349558 (1994-09-01), Cleveland et al.
patent: 5377146 (1994-12-01), Reddy et al.
Kabushiki Kaisha Toshiba
Nguyen Tan T.
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