Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1978-08-30

1981-01-27

Edlow, Martin H.

Static information storage and retrieval

Magnetic bubbles

Guide structure

357 13, 357 88, 365174, 365175, 365177, H01L 2712

Patent

active

042478634

ABSTRACT:
Disclosed herein is a small-sized semiconductor memory device, wherein an N.sup.+ (P.sup.+)-type single region having an input function and an output function and an electrode for controlling the electrical potential in a P(N)-type Si substrate are provided on the top surface of the P(N)-type Si substrate. In order to store carriers, i.e., an information, in the bulk of the substrate, an N (P)-type buried layer is formed below the N.sup.+ (P.sup.+)-type input-output region, mentioned above. Information is quickly transferred from or into the buried layer by means of the punch-through effect, which is realized by spreading a depletion layer formed at a PN junction between the input-output region and the Si substrate. Since the carriers are stored in the bulk of the substrate, the size of the memory device is reduced and the surface property of the device does not exert a harmful influence on the carriers.

REFERENCES:
patent: 4003036 (1977-01-01), Jenne
patent: 4079358 (1978-03-01), Arntz
patent: 4123771 (1978-10-01), Uchida
patent: 4136349 (1979-01-01), Tsang
Japanese Laid-Open Patent Specification No. 51-15938, Published Feb. 7, 1976.
Japanese Laid-Open Patent Specification, No. 51-93833, Published Aug. 17, 1976.

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