Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

1994-03-30

1995-03-14

LaRoche, Eugene R.

Static information storage and retrieval

Addressing

Including particular address buffer or latch circuit...

395400, 395425, 36523003, G11C 800, G06F 946

Patent

active

053982126

ABSTRACT:
A semiconductor memory device according to the present invention includes: a memory cell array including (2.sup.n +m) memory cells, wherein n and m are integers satisfying the relationship 2.sup.n <2.sup.n +m<2.sup.n+1 ; an address decoder for receiving an address signal of (n+l) bits and for specifying one of the (2.sup.n +m) memory cells in accordance with the address signal; an output circuit for outputting data stored in the memory cell specified by the decoding means; an empty address detecting circuit for receiving at least two bits of the address signal of (n+1) bits and for generating a detection signal which indicates whether the address signal represents an empty address or not; and a control circuit for receiving an enable signal and for generating a control signal for outputting the data stored in the specified memory cell in accordance with the enable signal, wherein the control circuit further receives the detection signal and generates a control signal for inhibiting the data from being output when the address signal specifies an empty address, regardless of the state of the enable signal.

REFERENCES:
patent: 4434464 (1984-02-01), Suzuki et al.
patent: 5042003 (1991-08-01), Belt et al.

Affiliated with

Also associated with

Rating

Semiconductor memory device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor memory device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-717153